Technical Reference
The Engineer's
AI Silicon Playbook
Process nodes, equipment, AI chip architecture, fab process flow, advanced packaging, and design flow — the complete technical foundations of the AI capex supercycle. Built for engineers who want to understand the full stack.
AI Chip Specifications
Current-generation compute — head-to-head
Equipment Landscape
The tools that make chips possible
Packaging Evolution
From wire bond to direct bond interconnect
IC Design Flow
From architecture to tapeout
Career Paths in AI Silicon
Where engineers are needed most
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The glossary has 100+ engineer-grade definitions. The weekly signal connects technical developments to market signals. Subscribe for deep-dives on specific equipment, process node transitions, and chip architecture.