Semiconductor 101

Semiconductor manufacturing turns sand into the brains of modern technology. Here's the journey from raw material to finished chip.

The Big Picture (3 Steps)

1. Design (The Blueprint)

• Engineers use software (EDA tools from Cadence, Synopsys) to design circuits
• A modern chip like NVIDIA's H100 has 80 billion transistors
• Design files are sent to a foundry (TSMC, Samsung, Intel) for manufacturing

2. Manufacturing (The Fab)

This is where capex gets intense:

• Wafer production: Silicon ingots are sliced into thin wafers (~$200-500 each)
• Photolithography: ASML's EUV machines ($200M each) etch circuit patterns
• Deposition & Etch: Applied Materials and LAM add/remove material layer by layer
• Ion Implantation: Dopants modify electrical properties
• Metrology: KLA inspects for defects at every step
• A leading-edge fab costs $20B+ to build

3. Assembly & Test (Packaging)

• Wafers are cut into individual dies
• Dies are packaged (traditional or advanced like CoWoS)
• Final testing ensures quality

Key Terms

• Wafer: Circular silicon disk (300mm for advanced chips)
• Node: Feature size (3nm, 5nm, 7nm) — smaller = more complex
• Yield: Good chips / total chips — critical for economics
• Lead time: Months from order to delivery

Why This Matters for Capex

Each generation requires:

• New equipment (EUV was a $10B+ inflection)
• Bigger fabs (TSMC's Arizona fab: $40B)
• Longer lead times for tools (ASML EUV: 18-24 months)